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Last Modified: 21 December 1999

6172 CAN Micro Controller Module


How it works

 

The 6172 is a digital I/O device, capable of interfacing various A/D - D/A converters (and of course various other digital devices) with the CAN bus, using a application layer protocol (like CANopen or DeviceNet).

From the application layer viewpoint, the 6172 is a node with 1024 digital inputs and 1024 digital outputs, all of which can be accessed via 128 parameters, attributes, objects, etc (depends on how the application layer calls them).

In CANopen, all these in-/outputs can be accessed using SDO (and PDO) :

 

The 6172 I/O (as seen from the CAN bus) is a 128 byte memory with special meaning to some locations (for more information look in the sequencer description):

 

Location

Symbolic name

Description

connector/pin

0 - 95

-

general purpose RAM

-

96 - 106

-

reserved for future use

-

107 RSCFG Sets RS232 configuration

3/3

3/5

3/6

3/8

108 RSOUT Shift-out memory location via RS232 interface
109

RSIN

Shift-in memory location from RS232 interface

110

RSRBL

Get amount of received characters in RS232 buffer
111

RSTBF

Get amount of free characters in RS232 buffer

112
113

PWMFL,
PWMFH

Sets PWM output frequency

3/2

114
115
PWMDL,
PWMDH
Sets PWM output duty cycle  

116

MISC

Miscellaneous commands

-

117

I2OUT

Writing this location shifts the data out the I2C interface

3/11

3/12

118

I2IN

Reading this location returns a byte shifted in from the I2C interface

119

SPISPD

Configures the SPI shifter BAUD rate

2/17

2/18

2/20

120

SPIPAT

Configures the SPI shifter clock polarity/phase and LSB/MSB first

121

SPIOUT

Writing this location shifts the data out the SPI shifter

122

SPIIN

Reading this location returns a byte shifted in from the SPI shifter

123

PORTA

Write parallel output port A, read the last written data

1/2 - 1/12

124

PORTB

Write parallel output port B, read the last written data

1/14 - 1/18

125

PORTC

Read parallel input port C

2/2 - 2/12

126

AIN1

Read 8 bits analogue input 1

3/14

127

AIN2

Read 8 bits analogue input 2

3/15

It is possible to access all 128 locations directly from the CAN bus (via parameter/attribute/object read/write messages).

Example:

A 24 bit shift register (like 3 pieces of CD4094) is connected to the (SPI) shifter, the 3 latch inputs are connected to PortA, bit 0 (out1). Assuming the shifter is already configured (with values in 'Config', 'Shift_Speed' and 'Shift_Pattern'), it takes 5 CAN messages to get 3 bytes of data to the outputs of these CD4094's:

  1. Write 1th byte to 'SPIOUT'.
  2. Write 2nd byte to 'SPIOUT'.
  3. Write 3rd byte to 'SPIOUT'.
  4. Set bit 0 of PORTA
  5. Reset bit 0 of PORTA

It should be clear that this method consumes a lot of CAN bus bandwidth, time and effort. In a CANopen system using a busspeed of 125 kBAUD, this sequence will take at least 8.6 milliseconds.

To increase speed and decrease CAN bus load, the 6172 contains an internal sequencer which can perform some very basic tasks to move the data from internal RAM to the CD4094's. The task performed by the above 5 CAN messages can be executed by this sequencer in about 70 uS. The CAN bus load is decreased to just one message, which will take about 1.8 milliseconds (using CANopen SDO at 125 kBAUD) or 0.75 milliseconds (using a CANopen PDO).

To configure the sequencer to perform this simple task, a number of steps have to be taken:

  1. Create sequencer program.
    In this case we will use sequence 3 and assume it starts at sequence program memory address 1140h, sequence is assembled in emulated mode.
    The sequencer program will look like this (the data should already be in memory location 0 .. 2):

    Address

    Code

    Data

    Symbolic name

    Action

    1140h

    50h

    0

    SHOM

    Shift out memory location 0

    1142h

    50h

    1

    SHOM

    Shift out memory location 1

    1144h

    50h

    2

    SHOM

    Shift out memory location 2

    1146h

    11h

    0

    SETA

    Output port A, set bit 0

    1148h

    12h

    0

    RESA

    Output port A, reset bit 0

    114Ah

    7Fh

    0

    ENDSQ

    end of sequence

  2. Configure serial output port (SPI) and reset portA bit 0 in sequence 0 (after power on or reset)

    Address

    Code

    Data

    Symbolic name

    Action

    114Ch

    12h

    0

    RESA

    Output port A, reset bit 0

    114Eh

    52h

    1

    SHSPD

    Shift speed is 1.1 uS / bit

    1150h

    53h

    2

    SHPAT

    Shift pattern is standard

    1152h

    73h

    0

    SRDY

    Activate READY output

    1154h

    7Bh

    3

    ENASQ

    Enable sequence 3

    1156h

    7Fh

    0

    ENDSQ

    end of sequence

  3. Configure sequence table:

    Address

    Data

    Description

    1000h .. 101Fh

    xxx

    ID data, free to use by user

    1020h

    20

    Sequencer version number

    1021h

    0

    No native code
    1022h 0 Reserved

    1023h .. 103Fh

    0

    No sequence starts on interval

    1040h

    114Ch

    Start address sequence 0 (initialization)

    1042h ..1045h

    0

    No sequence 1 or 2

    1046h

    1140h

    Start address sequence 3 (the actual function)

    1044h .. 107Fh

    0

    No other sequences

    1080h .. 1081h

    0

    No sequence starts on write of locations 0, 1

    1082h

    3

    Sequence 3 starts on write of locations 2

    1083h .. 10DFh

    0

    No sequence starts on write of locations 3 .. 95

    10E0h .. 113Fh

    0

    No sequence starts on read of locations 0 .. 95


    NOTE: generating the sequencer code and tables is made easy using the free available CDSystems Sequence Assembler
  4. Write the contents of the sequence table (in this case just addresses 1000h .. 1157h) to the 6172 (CANopen object 2100h, subindex 0, 1th byte is that of adress 1000h).
  5. Reset the node
  6. Write data (first the data for RAM location 0, then 1, then 2) to the sequencer RAM, the sequence will start as soon as location 2 is written, causing the data to be transferred into the CD4094's.