6172 CAN Core Module

Sequencer version 1.0 

The CAN Core module can be configured to process sequences of instructions to interface between the CAN bus and miscellaneous I/O chips (parallel or serial via SPI or I2C), or it can run an application, executing commands from the CAN bus and sending back replies.

A sequence can be started on an action on the CAN bus, an action in the custom I/O or on time intervals.

The sequencer can run up to 32 sequence programs created by the free available Sequencer Assembler.

More information about working with the sequencer can be found in 'How it works' and the Application Notes

The sequence memory consists of 4 Kb flash memory, the user must write the sequence program and configuration into this memory.

64 bytes of RAM memory is available for data exchange, write to a particular memory location can start a preselected sequence, read from a RAM memory location can start a preselected sequence, when the sequence is finished the data will be available for transmission.  

The data memory contains 64 user RAM bytes, the (memory mapped) sequencer I/O and I/O configuration.

The I/O locations (64 - 79) are primarily intended to be able to control all sequencer I/O directly from the CAN bus (without any sequence), for debug and test procedures.
 

Sequencer data memory
Memory address	Symbolic name	Description	Access Type
0		user memory	read / write
up to
63
64 (low byte) 65 (high byte)	PWMFL PWMFH	Frequency output configuration (PWM) Data Description 2 .. 65535 output frequency is (7.5E6 / data) Hz Output is updated only after writing memory location PWMDH, to prevent change when PWMDx still contains an 'old' value	read / write
66 (low byte) 67 (high byte)	PWMDL PWMDH	Duty cycle output configuration (PWM) Data Description up to value in PWMDx output is high for 100 * (PWMDx / PWMFx) percent of the time (always high if this value is equal or higher then PWMDx, always low if this value is zero) Output is updated only after writing memory location PWMDH. After writing PWMDH, the user should wait at least a complete PWM cycle (up to 9 milli-seconds if PWMFx is at maximum) before writing a new PWM value.	read / write
68	MISC	Miscellaneous command: Data Description 0 outputs a stop condition on the I2C bus 1 outputs a start condition on the I2C bus 2 indicates that the next I2C bus read command is the last before STOP 3 activates the SYNC output for 2 micro-seconds 4 clears the READY output 5 sets the READY output	write only
69	I2OUT	I2C shift-out, write starts shift out after write	write only
70	I2IN	I2C shift-in, read starts shift-in before read	read only
71	SPISPD	Shift speed configuration (SPI shifter) Data Description 0 0.3 µS / bit 1 1.1 µS / bit 2 4.3 µS / bit 3 17.1 µS / bit	read / write
72	SPIPAT	Shift pattern configuration (SPI shifter) Data Description 0 1 2 3 4 5 6 7 Input data is shifted in at the center point of the drawn data bits	read / write
73	SPIOUT	Shift-out register, write starts shift out after write	write only
74	SPIIN	Shift-in register, read starts shift-in before read	read only
75	PORTA	Parallel output port A, Out1 - Out8	read / write
76	PORTB	Parallel output port B, Out9 - Out12	read / write
77	PORTC	Parallel input port C, In1 - In8	read only
78	AIN1	Read 8 bits analogue input 1	read only
79	AIN2	Read 8 bits analogue input 2	read only

Reading a write only location returns a zero.
Writing a read only location has no effect.

The 4 Kb flash memory contains the sequencer programs and information about how to start them.

Sequence program memory	Description
0000h - 001Fh	Identification string (defined by user)
0020h	Sequencer version number (10 for version 1.0)
0021h - 003Fh	table of interval times
0040h - 007Fh	table of sequence start addresses
0080h - 00BFh	table of sequences start on write (start after data memory write)
00C0h - 00FFh	table of sequences start on read (start before data memory read)
0100h - 0FFFh	sequence command memory

 

A sequence will start automatically after the selected interval time.

Sequence intervals (0021h - 003Fh)
Sequence	address	Interval in 10 ms
1	0021h	0, 1 - 255
2	0022h	0, 1 - 255
up to	up to	0, 1 - 255
31	003Fh	0, 1 - 255

no sequence starts when interval = 0
 

The following table defines the start addresses for each sequence.

Sequence start addresses (0040h - 007Fh)
Sequence	address	Start address
0	0040h	0xxxh
1	0042h	0xxxh
up to	up to	0xxxh
31	007Eh	0xxxh

no sequence starts when start address = 0000h

Sequence 0 starts automatically after power up or Node reset, and cannot be started on a interval or reading/writing of user memory or a CALL instruction.
 

By writing a memory location by the application, e.g. a CANopen PDO write, a sequence can be started.
The sequence will be started after write to a memory location.

Sequence start on write (0080h - 00BFh)
User memory	address	Sequence
0	0080h	0, 1 - 31
1	0081h	0, 1 - 31
up to	up to	0, 1 - 31
63	00BFh	0, 1 - 31

no sequence starts when sequence = 0
 

By reading memory location by the application, e.g. a CANopen PDO write, a sequence can be started.
The sequence will be started before a read from a memory location.

Sequence start on read (00C0h - 00FFh)
User memory	address	Sequence
0	00C0h	0, 1 - 31
1	00C1h	0, 1 - 31
up to	up to	0, 1 - 31
63	00FFh	0, 1 - 31

no sequence starts when sequence = 0

Starting a sequence by reading or writing memory is only valid via CAN bus accesses (e.g. SDO, PDO). Any internal access from within a sequencer program will not start another sequence.
 

 

Sequencer command memory (0100h - 0FFFh)
address	command
0100h	first command
0102h	2nd command
up to	more commands
0FFEh	last possible command

A command always contains 2 bytes, the first byte (at even address) is the command, the 2nd byte contains additional data.

When writing the command table to memory, the 4 Kb FLASH memory is in fact completely erased first. So the user must send the complete table.
It is not necessary to send the complete 4 Kb, only the first 100h bytes are mandatory, the rest depends on the total sequencer program length.

NOTE on execution times:

These are the minimum execution times; the 6172 has three internal interrupt routines (1 mS timer, CAN bus and RS232). These interrupts stay enabled while executing a sequence, so the execution time of a sequence instruction can be longer then stated.

The MASKx command allows the user to define the port bits used/affected by the sequence.

This is a simple way to prevent a lot of code if a sequence just uses some bits of a output port, while the other bits should be unaffected.

If a bit is one in the MASKx operand, the user can output to and read from this bit. When a operand bit is zero, writing to this bit has no effect on the output ports, reading it always reads zero.

At the beginning of a sequence started on read/write or timer, the masks of all three ports are set to one's. A sequence started with the CALL command does not set the masks (uses the caller's mask).

The 6172 contains a internal watchdog which resets the CAN MCM if it is not serviced within 50 milli-seconds. This watchdog is cleared at the start of a sequence and after the end of it. Be shure that a sequence (including CALLed sequences) does not take more then 50 milli-seconds, or the system will reset.

During the execution of a sequence the CAN bus is not serviced by the main program (received messages are placed in a buffer), so it is bad practice to create a sequence that takes 50 milli-seconds anyway.

If for some reason (like a unintended recursive CALLed sequence) the watchdog does intervene, the restart of the sequencer will keep on resulting in a watchdog reset. In this case it may be impossible to write a new (correct) sequence in memory (because the SDO's aren't serviced).

By holding the IRQ input (connector J4, pin 14) low for 0.5 seconds after the RST input (connector J4, pin 15) is pulsed low and high again, the sequencer will be inhibited until the next (soft- or hardware) reset (with IRQ high). This enables the user to write a new (correct) sequence into memory.
 

write data into the AD7840 D/A converter.
Shift input is connected to the serial output ,
CS is connected to bit 1 of port A
14 data bits on address 22 and 23
 

Example sequence
Symbolic name	Code	Data	Description
SHSPD	52h	1	Shift speed: 1.1 us per bit
SHPAT	53h	2	Shift pattern
RESA	12h	1	Output port A: reset bit 1, CS of AD7840 low
SHOM	50h	23	Shift-out memory byte: 23, (high byte)
SHOM	50h	22	Shift-out memory byte: 23, (low byte)
SETA	11h	1	Output port A: set bit 1, CS of AD 7840 high
ENDSQ	7Fh	0	End of sequence

 

Generating the sequencer code and tables is made easy using the free available Sequencer Assembler

More information about working with the sequencer can be found in 'How it works' and the Application Notes