6172 CAN Core Module

Sequence Assembler version 2.01

ASMSEQ is a DOS program, especially made to create a 6172 MCM sequencer program.

ASMSEQ translates all symbolic instruction names (and memory location names) into sequencer machine code or 6172 internal CPU's native code and automatically creates all tables in the first 320 bytes of the sequencer program memory.

• Download filename: Asmseq-2.00.zip
  • Date: 10 April 2000
  • Version: 2.01
  • Size: 40 Kb
  • Description: Sequence Assembler for the 6172

• Command line format
• Source file format
• Sequencer commands
• Pseudo commands for sequence control
• Other pseudo commands
• Predefined labels
• Constants
• Mathematical and logic operators

Command line format

ASMSEQ is a MSDOS program and must be started with at least 1, up to 4 parameters.

ASMSEQ sourcefile (L) (F)

• 1^st parameter is the source file name (if no type is given, .TXT is assumed), this file contains the source program in ASCII format.
• 2^nd parameter (l or L), when present, activates list file output.
• 3^rd parameter (f or F), when present, enables the use of form feed characters (ASCII code 12) in the list file, only when the 2^nd parameter is present.
• 4^th parameter, (n or N), when present, the assembled sequence will be native code for the 6172 internal CPU. This will result in longer code (about 1.5 up to 3 times the size of 'emulated' code) but it will run up to eight times faster.

ASMSEQ can generate 3 different files:

1. sourcefile.SEQ: when no error detected, this file will contain the assembled destination file, ready to be uploaded into the 6172 MCM.
2. sourcefile.ERR: if any error detected, this file will contain one line per error with the sourcefile name, line number and type of error in ASCII.
3. sourcefile.LST: when the list parameter is present, this file will contain the sourcecode, assembled code and all errors (if any) in ASCII.

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Source file format

A source code line has the general format: 

 

LABEL:

COMMAND

OPERAND

;COMMENT

not all elements need to be present on a source code line.

• LABEL is a user defined symbolic name, maximum 8 characters long. It must start with a letter and may contain digits and underscore characters (e.g. lab_00). A label is not case sensitive and must be terminated by a colon.
• COMMAND is any one of the MCM sequencer commands or any of the assembler pseudo commands.
• OPERAND is a constant, LABEL name (without the colon) or the (assembler generated) result of an arithmetic operation.
• COMMENT is all text after the semicolon up to the end of line.

 example:

LABEL	COMMAND	OPERAND	COMMENT
;initialize PWM output frequency register
VALUE:	equ	$3035	;assign hexadecimal 3035 to label VALUE
	sequence	1	;define start of sequence 1
	ldwc	low VALUE	;$35
	stwio	PWMFL	;to PWM configuration
	ldwc	high VALUE	;$30
	stwio	PWMFH	;to PWM configuration

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 MCM Sequencer Commands (sequencer version 2.0)

A compact list of the MCM sequencer commands:

 

Command	Operand range	Description
ADCWC	0 - 255	Add constant with carry to working register
ADCWM	0 - 255	Add memory with carry to working register
ADDWC	0 - 255	Add constant to working register
ADDWM	0 - 255	Add memory to working register
ANDWC	0 - 255	Logical AND working register with constant
ANDWM	0 - 255	Logical AND working register with memory
BCANE	label	Branch to label if CAN controller can send a message
BCANF	label	Branch to label if CAN controller cannot send a message
BCC BHS	label	Branch to label if C flag is zero and previous instruction generated a valid C flag
BCS BLO	label	Branch to label if C flag is one and previous instruction generated a valid C flag
BEQ	label	Branch to label if Z flag is one and previous instruction generated a valid Z flag
BITxM	0 - 255	x=0..7: Test bit in memory location
BITA	0 - 7	Test bit in parallel output port A
BITB	0 - 7	Test bit in parallel output port B
BITC	0 - 7	Test bit in parallel input port C
BITWC	0 - 7	Test bit in working register
BNE	label	Branch to label if Z flag is zero and previous instruction generated a valid Z flag
BRA	label	Branch to label if in same sequence and within +127 and -128 instructions
CALL	3 - 27	Subroutine call of another sequence
CANSND	10h - 28h	Send CAN message with data from memory
CLRM	0 - 255	Clear memory location
CMPWC	0 - 255	Compare working register with constant
CMPWM	0 - 255	Compare working register with memory
CRDY	None	De-activate READY output (low)
DECM	0 - 255	Decrement memory location
DELAY	1 - 255	Delay 2 up to 510 micro-seconds
DISSQ	0, 1 - 31	Disable all sequences (operand is 0) or sequence 1 - 31, to start with interval or start on read/write
ENASQ	0, 1 - 31	Enable all sequences (operand is 0) or sequence 1 - 31, to start with interval or start on read/write
ENDSQ	None	End of current sequence
ERROF	1 - 8	Notify end of error to application layer (or clear error status)
ERROR	1 - 8	Notify an error to application layer (or set error status)
FSTINT	0 - 1	Disable or enable fast interrupt sequence
I2IM	0 - 255	Shift in user memory location from I2C bus
I2LST	None	Announce the last I2C read command coming
I2OC	0 - 255	Shift out constant to I2C bus
I2OM	0 - 255	Shift out user memory location to I2C bus
I2SPD	0 - 1	Set standard / fast I2C bus speed
I2STA	None	Generate a START condition on the I2C bus
I2STP	None	Generate a STOP condition on the I2C bus
INCM	0 - 255	Increment memory location
INPC	0 - 255	Input input port C to memory location
LDWC	0 - 255	Load working register with constant
LDWI	0 - 255	Load working register indirect from memory
LDWIO	96 - 127	Load working register from I/O space
LDWM	0 - 255	Load working register from memory
MASKA	0 - 255	Set port A masking
MASKB	0 - 15	Set port B masking
MASKC	0 - 255	Set port C masking
ORWC	0 - 255	Logical OR working register with constant
ORWM	0 - 255	Logical OR working register with memory
OUTA	0 - 255	Output memory location to output port A
OUTAC	0 - 255	Output constant to output port A
OUTB	0 - 255	Output memory location to output port B
OUTBC	0 - 255	Output constant to output port B
RESA	0 - 7	Reset bit of output port A
RESB	0 - 3	Reset bit of output port B
RHAS	None	Suspend processing of this sequence (28 - 31), resume processing as soon as possible
RHOI	None	Suspend processing of this sequence (28 - 31), resume processing synchronized to 1 milli-second timer
RLCWC	1 - 7	Rotate working register 1 - 7 bits left circular
ROLM	0 - 255	Rotate memory one bit left, shift in the carry
ROLWC	1 - 7	Rotate working register 1 - 7 bits left through carry
RORM	0 - 255	Rotate memory one bit right, shift in the carry
RORWC	1 - 7	Rotate working register 1 - 7 bits right through carry
RRCWC	1 - 7	Rotate working register 1 - 7 bits right circular
RSCFC	dd	Configure RS232 interface
RSIM	0 - 255	Shift in memory location from RS232 interface (buffer)
RSOC	0 - 255	Shift out constant to RS232 interface (buffer)
RSOM	0 - 255	Shift out memory location to RS232 interface (buffer)
SBCWC	0 - 255	Subtract constant with carry from working register
SBCWM	0 - 255	Subtract memory with carry from working register
SEQCE	see NOTE 1	Activate sequence on port C input edge
SEQCL	see NOTE 2	Activate seguence on port C input level
SETA	0 - 7	Set bit of output port A
SETB	0 - 3	Set bit of output port B
SHIM	0 - 255	Shift in user memory location from SPI shifter
SHLM	0 - 255	Shift memory one bit left, shift in a zero
SHLWC	1 - 7	Shift left working register, constant amount of bits
SHOC	0 - 255	Shift out constant to SPI shifter
SHOM	0 - 255	Shift out user memory location to SPI shifter
SHPAT	0 - 7	Set SPI shifter pattern
SHRM	0 - 255	Shift memory one bit right, shift in a zero
SHRWC	1 - 7	Shift right working register, constant amount of bits
SHSPD	0 - 3	Set SPI shifter speed
SRDY	None	Activate READY output (high)
STWI	0 - 255	Store working register indirect into memory
STWIO	96 - 127	Store working register in I/O space
STWM	0 - 255	Store working register in memory
SUBWC	0 - 255	Subtract constant from working register
SUBWM	0 - 255	Subtract memory from working register
SYNC	0 - 2	Output a 2 micro-second high pulse on the SYNC output, or enable/disable CAN generated SYNC pulses
TESTM	0 - 255	Test memory location
TGLA	0 - 7	Toggle bit of output port A
TGLB	0 - 3	Toggle bit of output port B
XORWC	0 - 255	Logical XOR working register with constant
XORWM	0 - 255	Logical XOR working register with memory

NOTE1: SEQCE expects 3 operands: the sequence number (0..31), the active edge (0 = falling, 1 = rising), the input port bit number (0 - 3).

NOTE2: SEQCL expects 3 operands: the sequence number (0..31), the active level (0 = low, 1 = high), the input port bit number (4 - 7).

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Pseudo commands for sequence control 

HEADER parameter 1 (, parameter 2 (, parameter ..))

The HEADER command allows the user to place text or numbers into the first 32 bytes of the sequence memory, for identification and version control purposes.

A HEADER must have at least one parameter (multiple parameters separeted by comma’s), each parameter may be a string or number (if the number isn’t higher then 255).

e.g. HEADER "Test sequence", 34, 2

A HEADER command may appear anywhere in the source file, multiple HEADER commands are allowed, as long as the total amount of characters or bytes generated by all HEADER commands doesn’t exceed the 32 byte limit.
 

SEQUENCE number, interval, stwrite, stread

The SEQUENCE commands defines the start of a sequence code. A SEQUENCE command must have one up to four parameters, a parameter (except ‘number’) may be empty to indicate the absense of it.

Number	Sequence number 0 - 31 (‘number’ is the only allowed parameter with sequence 0, 1 and 2).
Interval	Sets the interval time (* 10 milli-seconds) at which the sequence is automatically started (no interval when this value is zero or empty, or when the sequence isn't enabled with the ENASQ command)
Stwrite	Defines a memory location. When the application writes to this location (not from within a sequence), this sequence is started after the write. No start on write will be executed when this value is empty, or when the sequence isn't enabled with the ENASQ command.
Stread	Defines a memory location. When the application reads from this location (not from within a sequence), this sequence is started before the read. No start on read will be executed when this value is empty, or when the sequence isn't enabled with the ENASQ command.

Examples:

Sequence	0	;sequence 0, no extra parameters
Sequence	3,100	;3, executed every second
Sequence	28,,30	;28, executed after writing location 30
Sequence	13,,,2	;13, executed before reading location 2

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Other pseudo commands

TITLE text

The TITLE command specifies the header to be listed on the first line of each page in the list file. The text in truncated after 40 characters

Example: TITLE My first 6172 application
 

PAGE (page length (, line length))

PAGE with no expressions forces a new page in the list file
PAGE with one expression selects a new page size (number of lines)
PAGE with two expressions set the page size and maximum line length
Default page size is 66 lines of 80 characters per line
 

EQU expression

The EQU command assigns the result of the expression to a label, the integer result must be: -32768 <= result <= 32767.
Example: DEBUG: EQU 1

IF expression

ENDIF

When the expression given with the IF command is false (zero), all lines up to the ENDIF command are ignored.

Example:	IF	DEBUG	;true if DEBUG is nonzero
	SETB	3	;PortB bit 3 high
	DELAY	2	;for about 6 µS
	RESB	3	;PortB bit 3 low
	ENDIF

The IF command cannot be nested (no IF allowed during an active IF command).

END

This command specifies the end of the source file. Any text beyond the END command is ignored and not copied into the list file.

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Predefined labels

These labels are by default defined by the assembler and should not be redefined.
These labels define the sequencer I/O locations and sequence numbers (for use CALL and SEQUENCE commands).

LABEL NAME	VALUE	DESCRIPTION
RSCFG	107	RS232 configuration
RSOUT	108	Write character to RS232 buffer
RSIN	109	Read character from RS232 buffer
RSRBL	110	Get amount of received characters in RS232 buffer
RSTBF	111	Get amount of free characters is RS232 transmit buffer
PWMFL	112	PWM frequency configuration low byte
PWMFH	113	PWM frequency configuration high byte
PWMDL	114	PWM duty cycle configuration low byte
PWMDH	115	PWM duty cycle configuration high byte
I2CC	116	START/STOP/LAST command to I2C bus
I2OUT	117	Byte to I2C bus
I2IN	118	Byte from I2C bus
SPISPD	119	SPI speed configuration
SPIPAT	120	SPI pattern configuration
SPIOUT	121	Byte to SPI shifter
SPIIN	122	Byte from SPI shifter
PORTA	123	Output port A
PORTB	124	Output port B
PORTC	125	Input port C
AIN1	126	Analog input 1
AIN2	127	Analog input 2
SEQ_0	0	Sequence 0
SEQ_1	1	Sequence 1
SEQ_n	2 - 29	Sequence 2 - 29
SEQ_30	30	Sequence 30
SEQ_31	31	Sequence 31
NATIVE	0 or 1	When 0: sequence is being assembled in 'emulated mode'. When 1: sequence is being assembled in native code

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 Constants

Operands can be made from constants or expressions (with constants…).

Normally a constant is assumed to be a decimal number, the following special characters can force another type of constant:

 

	$	Hexadecimal constant (e.g. $34AF)
	~	Octal constant (e.g. ~32257)
	%	Binary constant (e.g. %0011010010101111)

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 Mathematical and Logic operators

Mathematics are limited, there is no priority for the operators * and / over + and -, the formula will be evaluated from left to right.

Logic operators (=, <, >) produce 0 when false and 1 when true.

 

OPERATION			RESULT
A	+	B	Arithmetic sum of A and B
A	-	B	Arithmetic difference between A and B
A	*	B	Multiplication of A and B
A	/	B	Division of A by B
A	MOD	B	Remainder of division of A by B
A	AND	B	Bitwise logical AND of A and B
A	OR	B	Bitwise logical OR of A and B
A	XOR	B	Bitwise logical EXCLUSIVE OR of A and B
A	SHR	B	A shifted right by B, with zero left fill
A	SHL	B	A shifted left by B, with zero right fill
	NOT	A	Bitwise logical inversion of A
	HIGH	A	High order byte of A
	LOW	A	Low order byte of A
A	=	B	True if A equals B
A	>	B	True if A is greater then B
A	<	B	True if A is less then B
A	<>	B	True if A is unequal to B
A	>=	B	True if A is greater then or equal to B
A	<=	B	True if A is less then or equal to B

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